Semiconductor integrated circuit devices (LSI) which are amid the trends of enhancement in integration density and performance are encountering the design complexity. For an LSI user who plans to develop an application system, it will take in many cases as long as one year before having a complete LSI. The longer development time is disadvantageous to responding quickly to market demands. In order to reduce the development time, it is crucial to find problems at early stages of design.
The MCM scheme deserves considering for alleviating the design complexity of LSI and realizing an intended electronic circuit device in a relatively short time. The MCM scheme is to mount LSI chips such as a microprocessor and memory on a high-density build-up board, so that a resulting electronic circuit device is comparable in performance to an SOC-based LSI.
For preparing an electronic circuit device to make an intended system in a relatively short time or for preventing in advance problems of an LSI to be design, the use of an FPGA (Field Programmable Gate Array) is effective. The FPGA implements a designed logic function at an early stage, enabling the finding of functional problems and the swift solution of the problems. For example, an intended logic function, such as the compressive communication protocol, is implemented by loading connection definition data into numerous memory cells of the FPGA, and it is operated to debug the logic function based on the operation result. The FPGA provides per se the intended logic function, or it enables the faster LSI design based on its capability of debugging LSI logic function at early stages.
The CPU operation program can be revised in case it is stored in an electrically-rewritable nonvolatile memory such as a flash memory, allowing slight alterations of the system design promptly. A microcomputer which provides this facility is called FPMC (Field Programmable Micro-Computer).
The inventors of the present invention have studied the organic combination of the MCM, FPGA and FPMC techniques for the debugging at early stages of SOC-based system development and for the configuration of a prototype system. However, such a scheme is yet to be offered.
The inventors of the present invention have revealed problems during the study as follows.
Firstly, the separate use of MCM and FPGA necessitates a larger board for mounting them and a longer wiring, and consequently in some cases does not behave the intended characteristics for implementing the function equivalent to an SOC-based LSI.
Secondly, in the case of implementing high-speed data transfer on the MCM, unmatching of characteristic impedance of the wiring has a larger influence of signal reflection as compared with the board of MCM, and it will be occasionally desirable to tune the output impedance to the output circuit of LSI.
Thirdly, for the case of face-down mounting of surface-mount semiconductor integrated circuits on a high-density board such as a build-up board, it is desirable to simplify the line connection test for the circuits on the mount board and the testing of the mounted circuits.
Fourthly, in order to speed up the data processing, it is necessary to speed up the data transfer between the microcomputer and the memory. The inventors of the present invention have noticed afterward the presence of Japanese Patent Unexamined Publication No. He. 8-167703. However, the invention described in the above-mentioned patent publication is intended to form a DRAM (dynamic RAM) on two semiconductor chips by dividing it into a memory cell section and a logic circuit section, with both chips being interconnected on the mount board, and this invention differs completely from the present invention from the viewpoint of semiconductor element structure as will be appreciated from the following detailed explanation.
It is an object of the present invention to provide an electronic circuit device which is capable of facilitating the debugging at early stages of SOC-based system development and also configuring a prototype system.
Another object of the present invention is to provide an electronic circuit device which is capable of altering the logic function and also speeding up the data transfer for data processing.
Still another object of the present invention is to provide an electronic circuit device which is capable of readily alleviating the signal reflection attributable to the unmatching of characteristic impedance of the wiring in accomplishing the high-speed data transfer.
Still another object of the present invention is to provide an electronic circuit device which is capable of dealing with the case of face-down mounting of surface-mount semiconductor integrated circuits on a high-density board such as a build-up board by facilitating the wiring connection test for the circuits on the mount board and the testing of the mounted circuits.
These and other objects and novel features of the present invention will become apparent from the following description and accompanying drawings.